Design a 3 Bit Ripple Counter Using Jk Flip Flop

Design ripple counter using JK flip flop for the state:

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•   modified 7 months ago

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Answer:

JK flip-flop:-

• The uncertainity in the state of SR flipflop when S=R=1 can be eliminated in JK flip-flop.The logic symbol and truth table of JK flipflop are given below.
• 

Counter:-

• A counter is a register capable of counting the number of clock pulses arriving at the clock input. The n-bit counter has n flipflops and it has 2n distinct states.

Mod-5 Asynchronous ripple down Counter:-

• In asynchronous ripple counter flipflops are connected in such a way that the complement output of first flip flop drives the clock for the next flip flop and so on. when n flipflops are used in the counter the count sequence starts from 2n-1 to 0000 . In Asynchronous counter are not clocked simultaneously, so the speed of operation will be less.
• Mod counter with less than 2n states can be constructed by allowing the counter to skip states that are not required. When Mod-x counter is to be designed a AND gate output is connected to the SET inputs of each flipflop. SET is an active high. So as soon as the AND gate output is low it will not effect the count sequence. When AND gate output is high it will set all the flip flops so that the counter immediately goes to the the 1111 state. Mod-5 asynchronous ripple down Counter can count from 111 to 011 and on next clock pulse it returns back to initial state i.e. 111.For Mod-5 counter the counter has to be reset as soon as count 011 is completed. That is it has to reset when it reaches 010.

Design of asynchronous ripple mod-5 down counter using clocked JK flip-flops.

1. Find the number of flip flops for the required MOD counter.
2. Choose the type of flipflops to be used.
3. Draw the state diagram.
4. Determine the flipflop inputs at which the counter has to be set. Decide the inputs required for the AND gate to SET the Counter.
5. Connect the circuit using flipflops and other gates .

Step 1: Find the number of flip flops for the required MOD counter.

• As we have to construct Mod-5 counter i.e N = 5.
• Number of flipflops required can be caluculated for minimum value of n which satisfies the below equation
• $2^n \ge N$
• As N=5 then n=3.
• Thus Number of flipflops required = 3

Step 2: Choose the type of flipflops to be used.

• As we have to design Mod-5 counter with JK flipflop, so the selected flipflop is JK.

Step 3: Draw the state diagram of required Mod counter.

• The states of a Mod-5 ripple down counter can be represented by a state diagram. Each counter state in the state diagram is represented by a circle containg a binary value. The prograssion is shown by a series of directional arrows.

Step 4:* Determine the flipflop inputs at which the counter has to be set. Decide the inputs required for the AND gate to SET the Counter.*

Step 5: Connect the circuit using flipflops and other gates .

• The state table and timing diagram of 3-bit ripple counter is given below.

Clock Pulse	QC	QB	QA
1	1	1	1
2	1	1	0
3	1	0	1
4	1	0	0
5	0	1	1

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Design a 3 Bit Ripple Counter Using Jk Flip Flop

Source: https://www.ques10.com/p/53497/design-ripple-counter-using-jk-flip-flop-for-the-1/

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